You are here:
LVDS Transmitter
The LVDS_TX is CMOS differential line transmitter designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 800 Mbps (400 MHz) utilizing Low Voltage Differential Swing (LVDS) technology
查看 LVDS Transmitter 详细介绍:
- 查看 LVDS Transmitter 完整数据手册
- 联系 LVDS Transmitter 供应商
SERDES IP
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC
- Low-Latency SerDes PMA
- Multi-protocol SerDes PMA
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
- 400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency