The design is a CAT 0/1 LTE Lite PHY, the demodulator is designed to be used together with an RF tuner, and an analog to digital converter. The system has an internal state machine to control its operation, and can be configured by an external processor via the AXI interface.
- User Equipment (UE) LTE Lite, compliant to CAT 0/1 PHY.
- Supports IF input.
- Flexible channel BW (1.4, 3, 5, 10, 15, 20) MHz.
- Modulation (QPSK, 16QAM, 64QAM).
- Time tracking.
- Parallel and Serial outputs.
- Synthesizable Verilog
- System Model (Matlab / C)
- Verilog Test Benches
- Machine to Machine communications
- Wireless sensor networks