The wide-range 0.6Gbps to 6.25Gbps 4-lane Deserializer and Serializer macros include all high-speed analog functions for four lanes of high-speed data transport between chips over FR4 and similar PCBs and over high quality cables. Trimmable on-die termination and linear equalization are included to compensate for channel loss enabling longer cables. They are optimized for low power operation and is suitable for a variety of chip-chip communication protocols.