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Low power, high speed, and high density Configurable ROM
The Novelics compiler-based family of advanced embedded memories includes low-power, high-speed, and high-density configurable coolROM targeting the most demanding applications.
The Novelics coolROM embedded memory IP is the industry’s highest density single-layer metal programmable ROM, with a macro size comparable to diffusion-ROM technology. This is achieved with a Novelics proprietary bitcell design that requires fewer transistor contacts per cell than conventional designs. A significantly smaller macro size and reduced capacitance results in significant dynamic power dissipation savings.
The Novelics coolROM is designed specifically with low-leakage applications in mind. The entire ROM core array is automatically maintained with no voltage bias when not in use, resulting in zero ROM core leakage. Peripheral circuits utilize positive channel length bias to further reduce leakage.
A high performance cycle frequency is obtained with advanced decoding and sensing circuits. In addition to fast access time, all control and address inputs require near-zero input setup time for the most demanding high speed applications.
The Novelics coolROM embedded memory IP is the industry’s highest density single-layer metal programmable ROM, with a macro size comparable to diffusion-ROM technology. This is achieved with a Novelics proprietary bitcell design that requires fewer transistor contacts per cell than conventional designs. A significantly smaller macro size and reduced capacitance results in significant dynamic power dissipation savings.
The Novelics coolROM is designed specifically with low-leakage applications in mind. The entire ROM core array is automatically maintained with no voltage bias when not in use, resulting in zero ROM core leakage. Peripheral circuits utilize positive channel length bias to further reduce leakage.
A high performance cycle frequency is obtained with advanced decoding and sensing circuits. In addition to fast access time, all control and address inputs require near-zero input setup time for the most demanding high speed applications.
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