This customisable PLL has been designed for use with high performance A/D converters where low jitter clock generation is critical to the success of applications such as DVB, Cable Modem and Wireless LAN.
A fractional PLL is used yielding excellent phase noise performance. The PLL is designed to provide excellent jitter performance while also maintaining low current consumption in a very small area.
The PLL includes built in self calibration which is run when the desired VCO frequency is changed.
To save area an external bandgap is used to supply a low noise reference current to this block.
The PLL is implemented in a standard 6 metal 65nm basic logic process with no analog options. It is readily portable to any similar manufacturing process or can be customized upon request.