IO 3.3V eMMC in GF (22nm)

Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to implement a single interface that can accomplish 4-bit, 8-bit eMMC & 4-bit SD operations. It includes an optional digi logic circuitry which is required for high-speed operations. It complies with eMMC 5.1 (JESD84-B51A) and SDIO 6.0 JEDEC standards.

• 查看 IO 3.3V eMMC in GF (22nm) 完整数据手册
• 联系 IO 3.3V eMMC in GF (22nm) 供应商