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Interface Controller & PHY
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Interface Controller & PHY IP Listing

2464 IP Cores (801 - 840)

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Camera SLVS-EC v.2.0 5.0Gbps / MIPI D-PHY v2-1 4.5Gbps combo Receiver 4-Lane

The CL12822M4R2JM2LIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processer) and DSP. The CL12822M4R2JM2LIP5000 is designed to support data ...

801
Die-2-die interfaces for chiplets

Analog I/OS and power line ESD solutions All voltage domains (0.75V to 5V) Additional voltage (e.g. 12V in 28nm proven)

802
SerialLite PHY with PCS

The VSG1G55SL2 is an enhanced High-Speed SerialLite macro with data transfer capabilities of up-to 3.125Gbps. It includes the PCS layer within the Macro and is capable of directly interfacing ...

803
PCIe Gen3 PHY

* Endpoint or Root Complex * PCIe standard multi-lane interface * PCIe power savings modes * Port bifurcation support

804
SATA HOST Synchronous IP

The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST XV5 IP is compliant with Serial ATA II specification ...

805
Serial ATA Dual Host Controller

The LDS_SATA HOST DUAL XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST DUAL XV5 IP is compliant with Serial ATA II specification ...

806
SATA Host controller on Virtex 5 FXT

The LDS SATA HOST XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST XV5 IP is compliant with Serial ATA II specification ...

807
Dual SATA Host controller on Virtex 5 FXT FPGA

The LDS SATA HOST DUAL XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST DUAL XF5 IP is compliant with Serial ATA II specification ...

808
SATA Host Controller

The LDS SATA HOST STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Startix IV GX FPGA. The LDS SATA HOST STR4GX IP is compliant with ...

809
SATA Host Controller on Spartan 6 LXT FPGA

The LDS SATA HOST SP6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Spartan 6 FPGA. The LDS SATA HOST SP6 IP is compliant with Serial ATA II specification ...

810
SATA Host Controller on Virtex 6 LXT

The LDS SATA HOST XV6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 FPGA. The LDS SATA HOST XV6 IP is compliant with Serial ATA II specification ...

811
SATA III HOST Controller on Virtex 6

The SATA III HOST Controller IP Core incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 speed grade 2 FPGA. The SATA III HOST Controller IP Core is compliant ...

812
SATA Host on Altera Arria II GX

The SATA Host IP Core incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA ARRIA II GX FPGA. The SATA Host IP Core is compliant with Serial ATA ...

813
SATA Device Controller on Altera Arria II GX

The SATA Device Controller IP Core incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA ARRIA II GX FPGA. The SATA Device Controller IP Core is ...

814
SATA HOST Controller on Cyclone IV GX

The LDS SATA HOST C4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Cyclone IV GX FPGA. The LDS SATA HOST C4GX IP is compliant with ...

815
SATA Device on Stratix IV GX

The SATA Device IP Core incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA STRATIX IV GX FPGA. The SATA Device IP Core is compliant with Serial ...

816
SATA Device on Virtex 6

The SATA Device IP Core incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 FPGA. The SATA Device IP Core is compliant with Serial ATA II specification ...

817
SATA RECORDER ON VIRTEX 6

The LDS SATA RECORDER XV6 IP is a complete recorder system IP. It can be configured according the recording performance required and the quantity of the data to record. The data can be recorded ...

818
SATA Host 6G Controller on Kintex 7

The SATA Host 6G Controller IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 speed grade 2 FPGA. The SATA Host 6G Controller IP is compliant with Serial ...

819
SATA 3 Host Controller on ZYNQ

The LDS SATA 3 HOST XZ7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS SATA 3 HOST XZ7 IP is compliant with Serial ATA III ...

820
SATA Device Controller on Kintex 7

The SATA Device IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 FPGA. The SATA Device IP is compliant with Serial ATA III specification ...

821
ZYNQ SATA 3 AHCI Host Controller with Linux Driver

The LDS SATA 3 HOST AHCI XZ7 IP incorporates the AHCI registers model, the Transport layer, the Link layer and the PHY layer on a Xilinx Zynq speed grade 2 FPGA. The LDS_SATA 3 HOST AHCI XZ7 ...

822
SATA 3 Host Controller on ARRIA V FPGA

The SATA 3 Host Controller IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Stratix IV GX FPGA. The SATA 3 Host Controller IP is compliant ...

823
Virtex 7 GTX SATA 3 Host Controller

The LDS SATA 3 HOST XV7X IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 7 GTX speed grade 2 FPGA. The LDS SATA 3 HOST XV7X IP is compliant with Serial ...

824
SATA HOST 3 ON VIRTEX 7 GTH

The LDS SATA 3 HOST XV7H IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 7 GTH speed grade 2 FPGA. The LDS SATA 3 HOST XV7H IP is compliant with Serial ...

825
LDS SATA RECORDER ON KINTEX 7

The LDS SATA RECORDER XK7 IP is a complete recorder sub-system IP. It can be configured according to the recording performance required and the quantity of the data to be recorded. ; ; - The ...

826
SATA 3 Host Controller on Xilinx Artix 7

The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS_SATA3_HOST_XA7 IP is compliant with Serial ATA III ...

827
SATA HOST 3 ON KINTEX 7 Ultrascale

The LDS SATA 3 HOST XK7U IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 Ultrascale speed grade 2 FPGA. The LDS SATA 3 HOST XK7U IP is compliant with ...

828
SATA 2 HOST ON CYCLONE 5 GX

The LDS SATA 2 HOST_C5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a ALTERA Cyclone V GX FPGA. The LDS SATA 2 HOST_C5GX IP is compliant with ...

829
SATA RECORDER ON VIRTEX 7 GTX

The LDS SATA RECORDER XV7X IP is a complete recorder sub-system IP. It can be configured according to the recording performance required and the quantity of the data to be recorded. ; ; - The ...

830
LDS SATA RECORDER ON ZYNQ

The LDS SATA RECORDER XZ7 IP is a complete recorder sub-system IP. It can be configured according to the recording performance required and the quantity of the data to be recorded. ; ; - The ...

831
LDS SATA RECORDER IP ON ARTIX 7

The LDS SATA RECORDER XA7 IP is a complete recorder sub-system IP. It can be configured according to the recording performance required and the quantity of the data to be recorded. ; ; - The ...

832
SATA 3 HOST IP on ARRIA 10 FPGA

The LDS-SATA3-HOST-A10GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Match FIFO on a INTEL ARRIA 10 GX FPGA. The LDS-SATA3-HOST-A10GX IP is compliant with ...

833
SATA Host on Xilinx Zynq Artix 7

The LDS SATA 3 HOST XA7 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Artix 7 speed grade 2 FPGA. The LDS SATA 3 HOST XA7 IP is compliant with Serial ATA ...

834
Xilinx Ultra Scale Plus SATA HOST IP

The LDS_SATA3_HOST_GTHE4 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Ultra Scale Plus GTHE4 FPGA. The LDS_SATA3_HOST_GTHE4 IP is compliant with Serial ATA ...

835
SATA Device IP Core (1.5, 3.0, 6.0 Gbps)

The Serial ATA Device Controller IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The serial link employed is a high-speed ...

836
Serial ATA Host Controller (1.5, 3.0, 6.0 Gb/s) for Xilinx UltraScale

The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The serial link employed is a high-speed differential ...

837
Serial ATA Host Controller (1.5, 3.0, 6.0 Gb/s)

The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage devices. The serial link employed is a high-speed differential ...

838
NVMe-to-SATA Bridge

The IntelliProp IPP-NV186A-BR is an NVMe-to-SATA Bridge that utilizes the IntelliProp NVMe Target IP Core and the IntelliProp SATA AHCI Host Core to create an NVMe-to-SATA protocol bridge. The ...

839
Multichannel module supporting ARINC429 Receiver/Transmitter

ARINC 429 IP Core is a multichannel module with support for virtually any number of transmitters and Receivers.

840

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