Configurable PCI Express 3.0, 2.0, 1.1 Controller IP for ASIC/SoC with AMBA AXI User Interface
You are here:
High Performance and High Density Two Port Register File Compiler with Column Redundancy Option - TSMC 55nm GP (CLN55GP)
Dolphin Technology maintains a broad IP portfolio of Memory Compilers, Specialty Memory and Memory Test & Repair (Memory BIST), providing SoC designers with solutions optimized for low power, high performance and high density across a broad range of process technologies. These solutions feature advanced power management capabilities - such as light sleep, deep sleep, power gating, dual rails and more - that meet even the most demanding low-power, low-leakage requirements.
查看 High Performance and High Density Two Port Register File Compiler with Column Redundancy Option - TSMC 55nm GP (CLN55GP) 详细介绍：
- 查看 High Performance and High Density Two Port Register File Compiler with Column Redundancy Option - TSMC 55nm GP (CLN55GP) 完整数据手册
- 联系 High Performance and High Density Two Port Register File Compiler with Column Redundancy Option - TSMC 55nm GP (CLN55GP) 供应商
memory compiler IP
- sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
- sROMet compiler - Memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
- sROMet compiler - Memory optimized for high density and high speed - compiler range up to 2M
- Dual Port SRAM compiler - Memory optimized for high density and low power - Dual Rail - compiler range up to 288 k
- sROMet compiler - TSMC 40 nm uLPeFlash - Non volatile memory optimized for high density and low power - Dual Voltage - compiler range up to 1M
- Single Port, Ultra High Speed, GF 22FDX, SRAM Memory Compiler