H.265 HEVC Decoder
Korusys provide both the IP core and, as an Intel FPGA Design Solutions Network Partner, experienced Design Services surrounding the core to implement the most efficient solution for each customer application. The IPr can be provided as a standalone netlist solution for integration into a customer’s design, or it can be customized and scaled to a particular implementation. A simple API is provided to ease integration.
This IPr is available as just the IP Core or as a package with our High Performance FPGA PCIe Accelerator Card.
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Block Diagram of the H.265 HEVC Decoder
H.265 HEVC Decoder IP
- 4K/ 8K LCEVC Video Decoder
- HEVC/H.265, H.264 and AVS2 Multi format Decoder IP for 4K 60fps
- HEVC/H.265, H.264, VP9 and AVS2 Multi format Decoder IP for 4K 60fps
- HEVC/H.265, H.264 Multi format Decoder IP for 4K 60fps
- HEVC/H.265, H.264, VP9, AV1 and AVS2 Multi format Decoder IP for 4K 60fps
- AV1/HEVC/AVC/VP9 Dual-core Video Codec HW IP: 8K60fps/4K240fps in Real-time