This IP is a programmable Analog PLL suitable for high speed clock generation. Its high speed VCO can run from 60MHz to 160MHz. The output frequency is from 30MHz to 80MHz. By setting PLL_DM [4:0] and PLL_DN [4:0] to different values according to different PLL_REFIN frequency, PLL_BAKO will be locked at the rising edge of PLL_REFIN and the output frequency PLL_CKO will be locked at the multiples of input frequency.
- Process: GSMC 0.13um IBLP 4P5M Dual Gate e-flash process (1.5v/HV).
- Supply voltage: 1.35v~1.5v~1.65v
- Duty cycle: 50%
- Typical current consumption: 1mA
- Standby current: 3uA*
- Locked time: 0.5ms
- Cycle-cycle jitter(peak to peak): 200ps
- Operating junction temperature: - 40°C ~ +25°C ~ +125°C