55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
You are here:
ESD solution set for HV/BCD processes
ESD solutions and Analog Pads for HV and BCD processes
Silicon and product proven in
TSMC 0.18um HV and BCD (GEN I and II)
TMSC 0.25um BCD (GEN I and II)
TSMC 0.35um HV and BCD
UMC 0.18um and 0.152um HV
TJ 0.18um and 0.35um BCD
Proprietary processes (0.13um, 0.35um)
All voltage domains (upto 80V proven)
Silicon and product proven in
TSMC 0.18um HV and BCD (GEN I and II)
TMSC 0.25um BCD (GEN I and II)
TSMC 0.35um HV and BCD
UMC 0.18um and 0.152um HV
TJ 0.18um and 0.35um BCD
Proprietary processes (0.13um, 0.35um)
All voltage domains (upto 80V proven)
查看 ESD solution set for HV/BCD processes 详细介绍:
- 查看 ESD solution set for HV/BCD processes 完整数据手册
- 联系 ESD solution set for HV/BCD processes 供应商
ESD IP
- ESD solution set for LV & advanced processes
- High ESD analog IO library
- TSMC based IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline TSMC & GlobalFoundries technologies
- SMIC18 General process, Multi-Voltage IO, High ESD perfermance
- ESD Protection