Dual FPD-link Transmitter, 30/24-bits color, 40-170 Mhz (SVGA/HDTV@120hz) - with 2 independant links capability LVDS SerDes 70:10 channel compression

This FPD-Link Transmitter Macro is based on National Semiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source and a display device.

This transmitter converts 10 LVDS, (low voltage differential signaling) data streams, into up to 60 bits (dual pixel 30-bits) CMOS data plus 10 control signals (VSYNC, HSYNC, DE, and 7 user-defined signals).

At a maximum pixel rate of 170Mhz, LVDS data line speed is 1.19Gbps, providing a total maximum bandwidth of 11.9Gb/s (1.487Gbytes per second).

This IP can drive two (2) independent displays with resolution up to UXGA/Full HD (dual asynchronous input /output).

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