Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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CSI2 RX; Camera Serial Interface, MIPI Compliant
The CSI2 Receiver IP Interfaces between Camera module which has the transmitter and the application processor. The CSI2 Receiver IP is fully compliant with the MIPI Alliance Specification for Camera Serial Interface 2 (CSI-2) Version 1.1 and D-PHY Version 1.1. The CSI2 Receiver IP supports flexible pixel interface where based on the data format the pixels are transferred to the application interface.
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Block Diagram of the CSI2 RX; Camera Serial Interface, MIPI Compliant
Camera Serial Interface IP
- MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors
- Automotive-grade MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors
- CSI2 TX; Camera Serial Interface, MIPI Compliant
- MIPI CSI-2 controller Receiver v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- MIPI CSI DSI Controller - CPHY CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
- High Speed SPI AHB IP Core- Serial Peripheral Interface