MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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AXI System Monitor Analog/Digital Converter
The AXI Sysmon ADC IP Core is a 32-bit slave peripheral that connects to the AXI4 (Advanced eXtensible Interface) and provides the troller interface for System Monitor (SYSMON) hard macro on Virtex®-6 family of FPGAs. This document describes the specifications for AXI Sysmon ADC IP Core.
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Embedded IP
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