The AXI Streaming FIFO allows memory mapped access to a AXI Streaming interface. The core can be used to interface to the AXI Ethernet without the need to use DMA. The principal operation of this core allows the write or read of data packets to or from a device without any concern over the AXI Streaming interface. The AXI Streaming interface is transparent to the user.
- 32-bit AXI Memory Map slave interface with point to point optimizations.
- Independent internal 2 Kb TX and RX data FIFOs
- Full duplex operation.
- Provides interrupts for many error and status conditions.