Advanced DPA- and FIA-resistant FortiMac HMAC SHA2 SW library
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AXI Protocol Checker
The AXI Protocol Checker core is designed to monitor AXI interfaces. When attached to an interface, it actively checks for protocol violations and provides an indication of which violation occurred.
The checks are synthesizable versions of the System Verilog protocol assertions provided by ARM in the “AMBA 4 AXI4, AXI4-Lite, and AXI4-Stream Protocol Assertion” library.
The checks are synthesizable versions of the System Verilog protocol assertions provided by ARM in the “AMBA 4 AXI4, AXI4-Lite, and AXI4-Stream Protocol Assertion” library.
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Interface and Interconnect IP
- Standard Compliant AMBA AXI SoC Interconnect, Soft IP
- Standard Compliant AMBA AHB SoC Interconnect, Soft IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Serial Peripheral Interconnect Master & Slave Interface Controller
- Physical Layer Interface Core
- PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect