DDR2/DDR3/DDR3L/LPDDR/LPDDR2/LPDDR3 6 in one combo IO with auto calibration - 40nm LL
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ATA-7 (UDMA 133) Target Interface
This is a ATA-7 compliant device interface core used for interfacing custom devices to IDE controller. Core is targeted for SOC implementations in ASIC and FPGA.
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