NVM OTP NeoBit in UMC (180nm, 160nm, 130nm, 110nm, 80nm, 55nm)
Hyper-Decoupling Capacitor with a Capacitance Multiplication, Series Inductance Nullification, Cybersecurity Enhancement and an Energy Harvesting capabilities
The Super Cap IP is meant to replace or work in parallel with existing on chip decoupling capacitors, thus can be shaped into various aspect ratios and sizes to fit on-chip “white space”, the area under power grids, etc. in the same fashion as typical on-chip decoupling capacitors. In similar fashion to typical decoupling capacitors, the IP blocks can be connected in parallel to increase overall RF emission reduction, reservoir capability, and effective capacitance.
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Block Diagram of the Hyper-Decoupling Capacitor with a Capacitance Multiplication, Series Inductance Nullification, Cybersecurity Enhancement and an Energy Harvesting capabilities
Video Demo of the Hyper-Decoupling Capacitor with a Capacitance Multiplication, Series Inductance Nullification, Cybersecurity Enhancement and an Energy Harvesting capabilities
A video demonstration of the CC_100IP embedded in USB devices