The eSi-I2C core implements the I2C two-wire protocol. It supports operation as both an I2C master and slave. The I2C is supplied with an AMBA APB slave interface and so can be driven by software or via DMA.
- Multi-master / slave operation.
- Clock stretching.
- 7 and 10-bit addresses.
- Programmable bit rate.
- Programmable digital filtering for SDA and SDL inputs.
- Configurable TX and RX FIFOs.
- AMBA 3 APB slave interface.
- DMA flow-control interface.
- Verilog RTL
- Simulation and synthesis scripts
- C API
Block Diagram of the APB I2C master and slave