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AHB Compliant Nand Flash Controller
NAND Flash Controller has a built-in AHB Slave Interface, handles all sorts of Nand Flash commands, address & data sequences. It allows the users to access the NAND flash memory simply by reading or writing into the Operational registers & the data buffer.
It consists of four major blocks:
- AHB Slave I/F: It consists of the AHB FSM & Operational registers.
- Synchronization Module (Sync): This block has handshake logic to communicate with the AHB interface and with the flash interface. To increase the throughput a single page size buffer is used for the data transactions.
- Error Correcting Code (ECC): This block generates & compares ECC (user programmable) for every page program & page read to/ from the Nand Flash respectively. It uses Hamming Code algorithm for single bit error correction and two or more bit error detection (SECDED). It calculates 28 bit ECC for every 512 word data.
- NAND Flash Interface: This block handles all sorts of Nand Flash commands, address, data sequences, and manages all the hardware protocols & flash timing requirements.
It consists of four major blocks:
- AHB Slave I/F: It consists of the AHB FSM & Operational registers.
- Synchronization Module (Sync): This block has handshake logic to communicate with the AHB interface and with the flash interface. To increase the throughput a single page size buffer is used for the data transactions.
- Error Correcting Code (ECC): This block generates & compares ECC (user programmable) for every page program & page read to/ from the Nand Flash respectively. It uses Hamming Code algorithm for single bit error correction and two or more bit error detection (SECDED). It calculates 28 bit ECC for every 512 word data.
- NAND Flash Interface: This block handles all sorts of Nand Flash commands, address, data sequences, and manages all the hardware protocols & flash timing requirements.
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