Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
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A/D Converter IP, 10 bits, 10Msps - 50Msps, UMC 90nm SP process
1.0V/3.3V 10-Bit 10MSPS~50MSPS Dual channel Pipelined Analog-to-Digital converter with optional power scaling, UMC 90nm SP Low-K Logic process.
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ADC/DAC IP
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- UCIe based 8-bit 48-Gsps Transceiver (ADC/DAC/PLL/UCIe)