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Safeway weekly ad bellevue IP Listing

8153 IP Cores (1 - 40)

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UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)

Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data centers, AI, and networking applications. The PHY’s flexible ...

1
Adaptive Clock Generation Module for DVFS and Droop Response

The Movellus™ Aeonic Generate AWM3 high-performance clock generation IP product is part of the Aeonic digital IP product family. Designed for Droop Mitigation and Dynamic Frequency Scaling ...

2
7-bit, 64 GSPS ADC Ultra Low Power

The ODT-ADS-7B64G-3 is an ultra-high-bandwidth time-interleaved ADC designed in a 3nm CMOS process. This 7-bit, 64GSPS ADC supports ac-coupled input signals up to Nyquist and features a full-scale ...

3
UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect

Blue Cheetah is a leader in Die-to-Die (D2D) interconnect solutions for chiplets in very advanced and low-cost packaging applications. BlueLynx™ is a revolutionary D2D subsystem architecture ...

4
UCIe PHY & D2D Adapter

Neuron IP’s UCIe PHY & D2D Adapter IP portfolio includes 32Gbps UCIe-Advanced (UCIe-A) & Standard (UCIe-S) cores as per the latest UCIe v1.1 specification for Chiplet products supporting various ...

5
12-bit 12-Gsps ADC

Unleash the power of precision and innovation with the NS_RX_12G_T16, a state-of-the-art 12-bit, 12-Gsps Analog-to-Digital Converter (ADC). This cutting-edge product redefines ADC architectures ...

6
PCIe 5.0,4.0,3.1 / 3.0根端口，端点，双模，具有Native用户界面的交换机端口Controller IP核

XpressRICH5是一款可配置且可扩展的PCIe Controller软 IP，专为ASIC和FPGA实现而设计。 XpressRICH5 IP符合PCI Express 5.0,4.0和3.1 / 3.0规范，以及PCI Express（PIPE）规范的P...

2 Testimonials
Serge Leef, Microsystems Technology Office Program Manager, DARPA

7
40G UCIe PHY for high-density advanced packages

Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI, and networking applications. The PHY’s ...

8
PCIe 4.0,3.1 / 3.0根端口，端点，双模式，具有Native用户界面的交换机端口Controller IP核

XpressRICH4是一款可配置且可扩展的PCIe controller Soft IP，专为ASIC和FPGA实现而设计。 XpressRICH4 IP符合PCI Express 4.0和3.1 / 3.0规范，以及PCI Express（PIPE）规范的PH...

9
16 位 5Msps SAR 通用 ADC IP 核

ADC IP在40nm Silicon Proven的节点上提供16位的分辨率和5Msps的采样率。这些组件实现了用于有线网络、无线通信和微控制器的尖端片上系统（SoC）。我们的数据转换器（ADC和DAC）IP...

10
24 位 320kHz 带宽 ADC IP

CT-320K是一款24位连续时间增量-西格玛模数转换模拟数字转换器IP。通过利用我们的专利开关式信号处理（SMSP）技术，我们的ADC可以无缝地适应需要小面积和低功耗的片上系统集成电路...

11
12位5Msps低功耗SAR ADC IP核

高性能、12 位分辨率、5Msps 采样率超低功耗混合信号 SAR ADC IP 核节点采用 28nm 工艺。这些产品使微控制器、医疗应用和通用的前沿片上系统（SoC）成为可能。我们的数据转换器...

12
24-bit Cap-less ADC 104.5 dB SNR low power and low latency 4 channels

The qADC104-SW3X-LR.01 is a mixed (analog and digital) Virtual Component containing four mono ADC, and additional functions offering an ideal mixed-signal front-end for low power, fast wake-up, ...

13
14 位、4.32Gsps 超高速宽带、时间交错流水线 ADC IP

这个超高速宽带模拟数字转换器基于16个时间交错的流水线子ADC，后接数字校正算法，用于增益、偏移和失调的校正。这个ADC IP的差分输入端由100欧姆电阻（100欧姆差分）终端，之后接...

14
16位100Ksps低功耗SAR ADC IP核

这个16位分辨率、超低功耗SAR ADC IP，在40nm节点上通过硅验证。这个IP专为微控制器、医疗应用和通用用途的片上系统（SoCs）芯片设计。此外，T2M的数据转换器（ADC和DAC）IP的分辨...

15
12-bit, 6 GSPS High Performance RF ADC in 16nm CMOS

The ODT-ADS-12B6G-16FFCT is a ultra-high performance RF sampling 12-bit 6 GSPS ADC in a standard 16nm CMOS process, implemented using Omni Design's groundbreaking low power SWIFT technology. ...

16
Adaptive Data Processing SoC

SFA 300 is designed to implement scalable processing applications supporting local networking. Optional accelerators and/or custom logic may be integrated to increase performance and minimise ...

17
Quad channel ADAS IP platform

This IP reference platform has been architected with ISO26262 applications and the fast integration of customer IP in mind from the start. This simplifies and speeds up the creation of the required ...

18
Single channel ADAS chip with FuSa monitor

The SFA250A is aimed at Functional Safety (FuSa) applications such as Advanced Driver Assistance Systems (ADAS) and contains an independent FuSa monitor compliant to ISO 26262 ASIL D – ASIC ...

19
Display Controller - LCD / OLED Panels (AXI Bus)

The Digital Blocks DB9000AXI LCD / OLED Display Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA AXI Protocol Interconnect to a LCD or OLED display panel. ...

20
Display Controller - LCD / OLED Panels (AXI4 Bus)

The Digital Blocks DB9000AXI4 LCD / OLED Display Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA AXI4 Protocol Interconnect to a LCD or OLED display panel. ...

21
12-Bit 125MS/s Pipelined ADC

12-Bits of Resolution ; 125 MS/s Sampling Rate ; 1.8V Power Supply ; 2Vp-p Analog Differential Input Range ; 250mW Power Dissipation ; Internal Voltage Reference ; Power Down Mode ; Power Scaling ...

22
10-bit 2MS/s SAR ADC

10-Bits of Resolution ; 2M/s SamplingRate ; 8 analog Input Channels ; 1.8V Input Range ; Area <0.5 sq. mm. ; Power Dissipation < 1mW ; Power Down Mode

23
Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency

The tCOD120-SW3-LR-D.02 is a mixed (analog and digital) Virtual Component containing 3 monoADC, a stereo DAC with headphone amplifier, and additional functions offering an ideal mixed signal ...

24
LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output

The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process technology. Its l...

25
LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output

The LDO IP is a 1.2V low-quiescent-current adjustable output voltage Low-Drop-Out (LDO) Linear Regulator implemented in the TSMC 3nm N3P CMOS process technology. Its l...

26
I3C V1.1 Advanced Controller

I3C is a new a standard from the MIPI Alliance that unifies and extends the legacy interfaces of I2C and SPI and adds new powerful features to support modern mobil...

27
I3C V1.1 Advanced Target

The I3C Advanced Target is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to any device. It ca...

28
I3C Lite Advanced Controller

The I3C Advanced Controller Lite is a highly configurable I3C controller that can be used in microcontroller-based environments to provide I3C connectivity to any ...

29
I3C Lite Advanced Target

The I3C Advanced Target Lite is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to any device. ...

30
Zero Additional Mask MTP

LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analog ICs especially for automotive applications. ...

31
Zero Additional Mask MTP IP, 2.2-5V 4kbit HHGrace 180BCD

LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analog ICs especially for automotive applications. ...

32
Zero Additional Mask MTP IP, 2.2-5V 4kbit Towerjazz 180 PM

LEE Flash ZT (ZT) achieves automotive grade temperature and quality grade. Perfect fit for trimming and parameter storage in Sensor, Power and Analog ICs especially for automotive applications. ...

33
Low-power SD/eMMC host controller IP provides advanced high-performance 32- and 64-bit AXI interface to the SoC

The Synopsys SD/eMMC Host Controller IP addresses the growing storage needs of mobile, consumer, IoT and automotive applications. The IP provides advanced features such as ADMA3 for the SD 6.0, ...

34
ARC NPX Neural Processing Unit (NPU) IP supports the latest, most complex neural network models and addresses demands for real-time compute with ultra-low power consumption for AI applications

The new Synopsys ARC® NPX Neural Processing Unit (NPU) IP family delivers the industry’s highest performance and support for the latest, most complex neural network models. The Synopsys ARC ...

35
Analog Front End: 16x 12-bit 200 MSPS ADCs, 14x Voltage DACs, 4x 250 MSPS DACs, 4x TVM, LDO

The ODT-AFE-8A1P-16FFCT is a highly integrated AFE designed in a 16nm CMOS process. The AFE includes eight 9-bit, 1GSPS ADCs, multiple LDOs and reference generators, and a 3rd party PLL IP. ...

36
Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO

The ODT-AFE-2T2R-GF22FDX is an ultra-high performance AFE designed in a Global Foundries 22nm process. The AFE includes two 12-bit, 4GSPS I/Q ADC pairs, two 14-bit, 8GSPS I/Q DAC pairs, four ...

37
2D (vector graphics) GPU IP Further advanced architecture for minimized CPU load and increased pixel performance in vector processing

GV380S and GV380T are Gen 4 2D (vector graphics) GPU IPs. With further advanced Gen.4 architecture for minimized CPU load and increased pixel performance in vector processing, GV380S and GV380T ...

38
20GSa/s 12-Bit Analogue-to-Digital Converter (ADC)

1-VIA’s high-speed low-power RF-ADC is targeted at upcoming telecommunication markets such as 5G and Satellite Communications. The RF-ADC has an effective 3dB bandwidth > 9GHz and 10 Effective ...

39
3D, motion adaptive, video noise reduction IP core

Don't waste your compressed video bandwidth by encoding noise. Noise from CMOS image sensors, decoding and/or transmission may use up to 20% of your compressed video bandwidth. Reduce this ...

40

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