The nSAD_ST130M_1V2_AD10b64M is a 64MS/s, 9.9 ENOB, power efficient Sigma Delta ADC designed on the ST 130 M technology. Built around a fully-differential 3rd-order single-bit low-pass modulator, ...

A solution including an input buffer with programmable gain, followed by a Delta Sigma Modulator (DSM) and a Decimation filter is provided. Additionally, the voltage reference buffers, the current ...

The silicon-validated 12-bit Delta-Sigma ADC IP is a 1.1V low-power 12-bit 64MHz-to-340MHz continuous-time Delta-Sigma ADC with OSR of 32 and implemented in Global Foundry Low-Power 40nm CMOS ...

The ShortLink 16 to 10 bit Delta-Sigma ADC 'SL40LP_10bSDADC_1' is a complete mixed-signal ADC IP. Based on a 32MHz clock frequency, it offers a 10-Bit ENOB at 1MHz signal bandwidth. 16-bit resolution ...

10-Bit Digital-to-Analog converter for communication system, UMC 0.18um GII Logic process.

The cell is a second order delta-sigma dual channel (I/Q) analog-to-digital converter that supports sample rates up to 8.5 kHz and oversampling ratio 128. This structure is based on the principle ...

The block is second order delta-sigma ADC with 5-level quantizer. The block consists of: - two integrating cascades based on switch capacitors technique; - 5-level flash-ADC; ...

The block is third order cascade (2-1) delta-sigma ADC with 5-level quantizers in both stages. The block consists of:  Two delta-sigma modulators second and first order, coupled in series ...

Delta-sigma stereo, audio DAC contains: reference voltage, control logic, digital buffers I2S interface (ws, sd, sck, gpio), two identical channels L and R: 2-order delta-sigma modulator, current ...

The block is third order cascade (2-1) delta-sigma ADC with 5-level quantizer in both stages. The block consists of: - Two delta-sigma modulators second and first order, coupled in series and ...

The block is fourth order cascade (2-2) delta-sigma ADC with 5-level quantizers in both stages. The block consists of: - two delta-sigma modulators second order, coupled in series, in each ...

The block is fourth order cascade (2-2) delta-sigma ADC with 5-level quantizers in both stages. The block consists of: - two delta-sigma modulators second order, coupled in series - clock ...

028TSMC_ADC_02 is analog ADC based on 4th-order sigma-delta modulator with fully differential/single-ended signal processing. Second order discrete time Sigma-Delta stage includes two discrete ...

180XFAB_ADC_01 is a 24-bit delta-sigma ADC with sampling rates from 44.1kSPS to 48kSPS. Two second order feedforward modulators are used to create forth-order cascade 2-2 Sigma-Delta Modulator ...

The analog to digital conversion is realized in the XPS Delta-Sigma ADC (XPS ADC) using Delta-Sigma conversion technique. This soft IP core is designed to interface with the PLB (Processor Local ...

Digital to analog converter (DAC) converts a binary number into a voltage directly proportional to the value of the binary number. A variety of applications use DAC including waveform generators ...

CT-320K是一款24位连续时间增量-西格玛模数转换模拟数字转换器IP。通过利用我们的专利开关式信号处理（SMSP）技术，我们的ADC可以无缝地适应需要小面积和低功耗的片上系统集成电路...

Today s market for automotive infotainment applications has become a key challenge for car makers which require optimal vocal command performances while offering best-in-cless listening sound ...

The block consists of 4 low pass filters connected in serially. Decimation takes place during a filtration process after each stage. The total decimation coefficient is 64. The block is fabricated ...

PLL is an automatic control system adjusting controlled oscillator frequency to be equal to reference oscillator frequency multiplied by a given integer. Frequency adjustment is carried out ...

PLL is an automatic control system adjusting controlled oscillator frequency to be equal to reference oscillator frequency multiplied by a given integer. Frequency adjustment is carried out ...

The SGC24012 is an accurate high resolution temperature measurement core with flexible utilization. It was specially designed for predictive protection systems but its high accuracy makes it ...

The SGC24012 is an accurate high resolution temperature measurement core with flexible utilization. It was specially designed for predictive protection systems but its high accuracy makes it ...

The SGC24012 is an accurate high resolution temperature measurement core with flexible utilization. It was specially designed for predictive protection systems but its high accuracy makes it ...

The SGC24012 is an accurate high resolution temperature measurement core with flexible utilization. It was specially designed for predictive protection systems but its high accuracy makes it ...

The SGC24012 is an accurate high resolution temperature measurement core with flexible utilization. It was specially designed for predictive protection systems but its high accuracy makes it ...

On the one hand, incremental delta-sigma modulators are able to convert DC and multiplexed input signals as known from Nyquist ADCs. On the other hand, using internal oversampling and noise ...

055TSMC_PLL_02 is a PLL frequency synthesizer that generates a high-frequency signal in the range from 3.5GHz to 7GHz. The synthesizer consists of 4 voltage-controlled oscillators (VCO) with ...

130GF_PLL_01 is a ring VCO based phase-locked loop frequency with 16-64 MHz CMOS compatible output clock and fine frequency resolution thanks to the embedded delta-sigma modulator (DSM). The ...

This IP include a PGA and a delta-sigma ADC, can be used in various sensor measurement.

This IP is a 16bit resolution 16kHz sample rate voice CODEC on TSMC embedded-flash ULP process. The IP include inner LDO PGA and delta-sigma ADC. The inner ADC supports multi sampling rate. ...

This is an analog PLL frequency synthesizer, which can generate independent clock with frequency range from 25MHz to 1.4GHz. It supports 4MHz to 180MHz input clock frequency range.This IP works ...

Ridgetop’s Audio DAC uses delta-sigma architecture. As shown in Figure 1, the DAC uses a digital interpolation filter, a digital secondorder delta-sigma modulator, and a 32-tap analog reconstruction ...

The SM-CTDSM-250M is a 12-bit continuous-time delta-sigma (CTΔΣ) analog-to-digital converter IP. By leveraging Seamless’ patented Switched-Mode Signal Processing (SMSP) technology, our ADC ...

The SM-CTDSM-400M is a 12-bit continuous-time delta-sigma (CTΔΣ) analog-to-digital converter IP. By leveraging Seamless’ patented Switched-Mode Signal Processing (SMSP) technology, our ADC ...

The SM-CTDSM-800M is a 12-bit continuous-time delta-sigma (CTΔΣ) analog-to-digital converter IP. By leveraging Seamless’ patented Switched-Mode Signal Processing (SMSP) technology, our ADC ...

The SM-CTDSM-40M is a 12-bit continuous-time delta-sigma (CTΔΣ) analog-to-digital converter IP. By leveraging Seamless’ patented Switched-Mode Signal Processing (SMSP) technology, our ADC ...

The SM-CTDSM-80M is a 12-bit continuous-time delta-sigma (CTΔΣ) analog-to-digital converter IP. By leveraging Seamless’ patented Switched-Mode Signal Processing (SMSP) technology, our ADC ...

The SM-CTDSM-45M is a 15-bit continuous-time delta-sigma (CTΔΣ) analog-to-digital converter IP. By leveraging Seamless’ patented Switched-Mode Signal Processing (SMSP) technology, our ADC ...

STAR3001 is a third order Delta-Sigma ADC which achieves an SNR of >80dB over a 50Hz bandwidth. Chopping is used to maintain good SNR at DC and hence reduce 1/f noise effects. A 1-bit quantizer ...