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400MHz DLL in SMIC 40Nll
查看 400MHz DLL in SMIC 40Nll 详细介绍：
- 查看 400MHz DLL in SMIC 40Nll 完整数据手册
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400MHz DLL IP
- DDR DLL IP, 100MHz - 400MHz, Output: 25% Delay, UMC 0.13um HS/FSG process
- DDR DLL IP, 200MHz - 400MHz, Output: 25% Delay, UMC 0.11um HS/AE process
- DDR DLL IP, Input: 192MHz - 400MHz, Output: 96MHz - 200MHz (13.5% - 36.6% Delay), UMC 0.13um HS/FSG process
- DDR DLL IP, Input: 400MHz - 533MHz, Output: 200MHz - 266MHz (13.5% - 36.6% Delay), UMC 0.13um HS/FSG process
- DDR DLL IP, Input: 100MHz - 400MHz, Output: 100MHz - 400MHz, UMC 65nm SP process
- DLL IP, Input: 100MHz - 400MHz, Output: 100MHz - 400MHz, UMC 0.11um HS/FSG process