Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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32G Fibre Channel (32GFC) Reed-Solomon Forward Error Correction
The Xilinx® LogiCORE™ 32G Fibre Channel (32GFC) RS-FEC IP core implements the Reed-Solomon Forward Error Correction (RS-FEC) sublayer as described in the INCITS Fibre Channel Framing and Signaling T11/15-253v2 specification.
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Ethernet IP
- 10G-100G MACsec Security Module for Ethernet
- 224G Ethernet PHY in TSMC (N3E)
- 112G Ethernet PHY in TSMC (N7, N5, N3P)
- Multi-protocol SerDes PMA
- 1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency