InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
The Calcite core comes bundled as a compute subsystem, with integrated AMBA protocol interconnects (supports AXI4, AHB) and uncore components (PMU, debug, interrupt controllers etc).
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Block Diagram of the InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
![InCore Calcite Series: 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA. Block Diagam](http://www.design-reuse.com/sip/blockdiagram/54844/20240716011705-main-Calcite-DnR-Block-Diagram.png)
32-Bit IP
- RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
- ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
- ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
- ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- Compact, low-power 32-bit RISC CPU