Analog Front End: 8x 12-bit 2 GSPSADCs, 4x 12-bit 200 MSPS ADCs, TVM, PLL, LDO
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3.3V 100MHz Oscillator IO Staggered Pad Set
The 3.3V 100MHz Oscillators library provides a 100 MHz crystal oscillator macro I/O cell. An adapter cell is included to utilize this oscillator with libraries based on the 1.8V pad ring bus structure.
The 22nm libraries are available in inline and staggered CUP wire bond implementations with a flip chip option.
To utilize these cells in the pad ring, an additional library is required – 3.3V Support: Power. That library contains the DVDD/DVSS power cells necessary for ESD protection, the POC and VREF cells, and a rail splitter to isolate the oscillator in its own power domain as recommended. It also contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. The rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
The 22nm libraries are available in inline and staggered CUP wire bond implementations with a flip chip option.
To utilize these cells in the pad ring, an additional library is required – 3.3V Support: Power. That library contains the DVDD/DVSS power cells necessary for ESD protection, the POC and VREF cells, and a rail splitter to isolate the oscillator in its own power domain as recommended. It also contains an input-only buffer, isolated analog I/O, and a full complement of power cells along with corner and spacer cells to assemble a complete pad ring by abutment. The rail splitter allows multiple power domains to be isolated in the same pad ring while maintaining continuous VDD/VSS for robust ESD protection.
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ESD IP
- on-chip ESD protection
- TSMC RF ESD specifiically targeting low capacitance ESD
- 1.8V/3.3V flipchip I/O library with 4kV HBM ESD protection, I2C compliant ODIO
- A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V GPIO, 1.8V to 3.3V Analog, with associated ESD cells.
- A 5V Library for Generic I/O and ESD Applications TSMC 12nm FFC/FFC+ process.
- RF I/O Pad Set and Discrete RF ESD Protection Components