Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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200MHz Integer PLL
The ll_pll6200s01_lf6s is a 3.3V/1.5V dual supply-voltage phase locked loop (PLL) with a wide-output-frequency-range for frequency synthesis. It consists of a phase frequency detector (PFD), a charge pump, a voltage-controlled oscillator (VCO), a 6-bit pre-divider, a 6-bit main-divider, two 2-bit scaler, and an automatic frequency control (AFC).
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