ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
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15.5nA Current Bias with Enable - Ultra Low Voltage (0.9V), Ultra Low Power (50nW) Silterra 0.18 μm
This macro-cell is an ultra low power general purpose current bias generator core designed for SilTerra 0.18µm CL180G CMOS technology. The circuit generates 7 × NMOS 15.5nA current branches and 1 × NMOS 7.75nA branch. The current bias is temperature compensated. The core is easily retargeted to any other CMOS technology due to high portability architecture.
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Block Diagram of the 15.5nA Current Bias with Enable - Ultra Low Voltage (0.9V), Ultra Low Power (50nW) Silterra 0.18 μm
