DXTP GPU, and advanced graphics and compute acceleration for power constrained devices
12位1Msps低功耗SAR ADC IP核
查看 12位1Msps低功耗SAR ADC IP核 详细介绍:
- 查看 12位1Msps低功耗SAR ADC IP核 完整数据手册
- 联系 12位1Msps低功耗SAR ADC IP核 供应商
Block Diagram of the 12位1Msps低功耗SAR ADC IP核

ADC/DAC IP
- 12bit 5Gsps silicon proven High performance Current Steering DAC IP Core
- Audio codec with capacitor-less 106 dB dynamic range ADC and 120 dB SNR DAC with low latency
- 12-bit 12-Gsps Transceiver (ADC/DAC/PLL)
- 8-bit 48-Gsps Transceiver (ADC/DAC/DLL)
- UCIe based 12-bit 12-Gsps Transceiver (ADC/DAC/PLL/UCIe)
- UCIe based 8-bit 48-Gsps Transceiver (ADC/DAC/PLL/UCIe)