IP Cores宣布再次推出其用于400G以太网的Reed-Solomon编解码器

PALO ALTO, Calif. -- May 29, 2018 -- IP Cores, Inc., (California, USA, http://www.ipcores.com) has announced additional shipments of the cores from its RS200 forward error correction IP core family that supports the IEEE 50, 200, and 400 Gbps standards.

“RS200 is a well-known series of cores that follow in the footsteps of our hugely successful RS100 family,” said Dmitri Varsanofiev, CTO of IP Cores, Inc. “Our developers will keep tracking the progress of the fast-moving IEEE 802.3 standardization group, so that our customers always have access to the FEC IP cores that are reflecting the Clause 91 and Clause 134 in the latest versions of the standards”.

IEEE 50G, 200G, and 400G Ethernet

IEEE 802.3bs (http://www.ieee802.org/3/bs/) standardization group had added 400 Gbps data rate to PHYs to the IEEE 802.3 Ethernet specification and and IEEE 802.3cd (http://www.ieee802.org/3/cd/) is adding the 50, 100, 200 Gbps. RS200 cores, shipping for more than a year, support the ASIC designs targeting these standards and are available in a variety of bus widths and target clock rates.

The RS200 FEC cores support the RS(528, 514) and RS(544, 514) ocdes. Just like the RS100 family, RS200 cores support channelization (a.k.a. fracturability, ability to process in time-multiplexed fashion, for example 1x400 Gbps stream, 2x200 Gbps, 1x200 + 1x100 + 2x50 Gbps, etc.).

About IP Cores, Inc.

IP Cores (http://www.ipcores.com) is a rapidly growing California company in the field of security, error correction, data compression, and DSP IP cores. Founded in 2004, the company provides hardware IP cores for embedded, communications and storage fields, including AES-based ECB/CBC/OCB/CFB, AES-GCM and AES-XTS cores, MACsec 802.1AE, IPsec and SSL/TLS protocol processors, flow-through AES/CCM cores with header parsing for IEEE 802.11 (WiFi), 802.16e (WiMAX), 802.15.3 (MBOA), 802.15.4 (Zigbee), public-key accelerators for RSA and elliptic curve cryptography (ECC), true random number generators (TRNG), cryptographically secure pseudo-random number generators (CS PRNG), secure cryptographic hashes (SHA-1/MD5, SHA-224, SHA-256, SHA-384, SHA-512, SHA-3), lossless data compression cores, low-latency and low-power fixed and floating-point FFT and IFFT cores, as well as cyclic, Reed-Solomon, LDPC, BCH and Viterbi forward error correction (FEC) decoder cores.