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On-Die PDN Analyzer for Transistor-Level Visibility and Telemetry

Cryptographic Cores IP

Agile Secure Element

Lightweight Root-of-Trust

• Rapidly implement secure boot and attestation capabilities without significant area, cost, or complexity overhead.
• Prevent malicious software attacks, unauthorized access, and firmware tampering to safeguard critical device functionality.

Logic based Hardware Root-of-Trust - Physical Unclonable Function (PUF)

Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)

Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)

• Ultra Low Standby Current
• .72V to .88V
• Internal Bist Mux

Register File with low power retention mode and 3 speed options

• Ultra-Low Leakage: High VT (HVT) and low leakage HVT (LLHVT) devices used with source biasing to minimize standby currents while operating at low voltage.

Special Purpose Low (Statistical) offset Operation Amplifier

• Power Supply : 1.8 V
• Open loop gain : 109 dB
• PSRR : 98 dB@ 1 KHz

Low Noise, High PSRR Replica Voltage Regulator

• Power Supply : 1.8 V
• Output voltage : 1.2 V
• Quiescent current: 7.3 mA

36Kbyte EEPROM IP with configuration 32p32w288bit and oscillator

TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link

• Universal LVDS-based interfaces supporting variety of Tx and Rx configurations.