VC Verification IP for CPRI
Synopsys VC VIP, based on its next generation architecture and implemented in native System Verilog/UVM, runs natively on all major simulators. VIP can be integrated, configured, and customized with minimal effort. Test bench development is accelerated with built-in verification plan and functional coverage.
查看 VC Verification IP for CPRI 详细介绍:
- 查看 VC Verification IP for CPRI 完整数据手册
- 联系 VC Verification IP for CPRI 供应商