The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for ...

The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2/DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for ...

The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for ...

The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low ...

The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2/LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for ...

The INNOSILICON DDR IPTM Mixed-Signal DDR5/4 Combo PHY s provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low power ...

The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low power ...

Innosilicon can provide different Die2Die solution for customer depend on package type, Following is Innosilicon Die2Die IP family: Innolink-A, Serdes base, up to 32/56Gbps/pair, long reach, ...

The INNOSILICON DDR IPTM Mixed-Signal LPDDR4X/4/3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low power ...

The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low ...

The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low power ...

The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/2 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low power and ...

The DDR3/2 PHY is a complete mixed-signal IP solution designed to provide DDR 3/2 SDRAM connectivity in a System-On-a-Chip (SOC) design targeted to a specific fabrication process. The DDR3/2 ...

The INNOSILICON DDR IPTM Mixed-Signal LPDDR5/5X/4/4X COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low ...

The INNOSILICON DDR IPTM Mixed-Signal LPDDR5/4/4X COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devices. It is optimized for low ...

Innosilicon can provide different Die-to-Die and Chip-to-Chip solutions for customer according to package types. The followings are Innosilicon Die-to-Die and Chip-to-Chip IP family:  Innolink-A, ...

Innosilicon HDMI RX IP is designed to receive and recover the video and audio data from a HDMI source device for display applications, which is compatible with HDMI2.0, HDMI1.4 and DVI1.0 specifications. ...

The MIPI D-PHY Bidirectional 2-Lane(4-Lane) macro implements the physical layer of bidirectional universal lanes for the MIPI D-PHY interface. The MIPI D-PHY Bidir 2/4L is stacked in a configuration ...

The MIPI D-PHY RX 2/4 Lanes macro implements the physical layer of universal lanes for the MIPI D-PHY interface, stacked in a two/four data lanes and one clock lane configuration. The MIPI D-PHY ...

VeriSilicon SMIC 0.13μm SSTL2/SSTL18 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13μm Logic 1P8M ...

Innosilicon HBM2E PHY IP is a silicon proven product with max speed up to 3600Mbps per DQ data, HBM2E memory has 1024bit DQ, total bandwidth can be 3.6Tbps. Innosilicon HBM2E PHY IP can support ...

Innosilicon INNOLINK™ IP provides a leading-edge chiplet solution allowing massive amounts of low-latency data to pass seamlessly between smaller chips as if they were all on the same bus. ...

VeriSilicon SMIC 0.18um 1.8V/3.3V SSTL2 I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18um Logic 1P6M Salicide 1.8/3.3V ...

VeriSilicon SMIC 0.18um 1.8V/3.3V SSTL3 I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.18um Logic 1P6M Salicide 1.8/3.3V ...