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Zigbee Transceiver PHY
The modulation and spreading functions for the O-QPSK PHYs are processed through 3 steps. First, each 4 bits are gathered to represent 1 symbol which has a value from 0 to 15. Second, each symbol is used to select among 16 PN sequences called chip. Finally, each chip is modulated using O-QPSK with half-sine pulse shaping.
The Receiver scans the incoming data from the digital mixer for a preamble. Once a preamble is detected, the Start of Frame Delimiter (SFD), frame length, and other receiver status information is sent to the upper layer. Additionally, the payload data is written to the received data buffer to create the PSDU packet, which is transferred to the MAC layer when requested. The PHY notifies the MAC layer for arrival of MAC Protocol Data Unit (MPDU) along with the LQI information via an interrupt. If a valid preamble is not detected, it gives feedback to the packet time error detection block to restart the energy detection process. The design includes ED and LQI circuits to support CCA modes by MAC defined in IEEE 802.15.4.
The design includes a standard 32-bit AHB-lite, slave interface version 3.0, with registers as defined in the Register Description section of the Datasheet.
The Receiver scans the incoming data from the digital mixer for a preamble. Once a preamble is detected, the Start of Frame Delimiter (SFD), frame length, and other receiver status information is sent to the upper layer. Additionally, the payload data is written to the received data buffer to create the PSDU packet, which is transferred to the MAC layer when requested. The PHY notifies the MAC layer for arrival of MAC Protocol Data Unit (MPDU) along with the LQI information via an interrupt. If a valid preamble is not detected, it gives feedback to the packet time error detection block to restart the energy detection process. The design includes ED and LQI circuits to support CCA modes by MAC defined in IEEE 802.15.4.
The design includes a standard 32-bit AHB-lite, slave interface version 3.0, with registers as defined in the Register Description section of the Datasheet.
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Block Diagram of the Zigbee Transceiver PHY
Zigbee IP
- Multi-protocol wireless plaform integrating 802.11ax (Wi-Fi 6), Bluetooth 5.4 Dual Mode, 802.15.4 (for Thread, Zigbee and Matter)
- IEEE 802.15.4 (ZigBee) CCM* AES Cores
- Bluetooth LE v5.3 / Zigbee 3 RF/PHY for Global Foundry 55nm (Silicon proven IP)
- Zigbee 802.15.4 for ultra-low power portable applications
- Zigbee v3.0/ IEEE 15.4 Linklayer, MAC(HW/SW), Software Stack and Profiles IP
- 802.15.4 (Zigbee, 6LoWPAN, RF4CE, ISM) PHY