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XAUI PHY SMIC 55/65LL
The Innosilicon XAUI PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 standard. The PHY supports XAUI physical layer specifications.
The PHY module includes a top level wrapper integrating both the Physical Media Attachment (PMA) layer, and the Physical Coding Sub-Block (PCS) layer.
The PHY module includes a top level wrapper integrating both the Physical Media Attachment (PMA) layer, and the Physical Coding Sub-Block (PCS) layer.
特色
- Idle is substituted as K,R or A in Transmit Direction
- K,R and A are substituted back to Idle in Receive Direction
- Sequenced Ordered Sets might be received and stored, then are transmitted when Idle on the bus
- Bit Lock and COMMA Synchronization
- De-skew between Lanes
- Programmable Parameter Registers
- Auto Calibration on Termination Resistors
- Reduced XAUI support
优势
- As with all Innosilicon IP, the focus is on silicon proven, fully certified solutions providing:
- Small size
- Low power
- High ATE coverage
- Simple integration
- Flexible customization
应用
- 10G Ethernet Physical
- RXAUI Physical
- Single Lane Available @3.125Gbps
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