Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
You are here:
Virtex-5 FPGA RocketIO GTP Transceiver Wizard
The LogiCORE™ IP Virtex-5 FPGA RocketIO GTP Transceiver Wizard automates the task of creating HDL wrappers to configure Xilinx Virtex-5 FPGA on-chip GTP transceivers. The Wizard’s customization GUI allows users to configure one or more high-speed serial transceivers using either pre-defined templates supporting popular industry standards, or from scratch, to support a wide variety of custom protocols.
查看 Virtex-5 FPGA RocketIO GTP Transceiver Wizard 详细介绍:
- 查看 Virtex-5 FPGA RocketIO GTP Transceiver Wizard 完整数据手册
- 联系 Virtex-5 FPGA RocketIO GTP Transceiver Wizard 供应商
Interface and Interconnect IP
- AXI- Interconnect : Advanced Extensible Interface Bus IP
- Universal Chiplet Interconnect Express (UCIe) Controller
- Serial Peripheral Interconnect Master & Slave Interface Controller
- UCIe/BoW BlueLynx™ Dual Mode PHY and subsystem IP for chiplet interconnect
- Physical Layer Interface Core
- PCIe 5.0 Serdes PHY IP, Silicon Proven in TSMC 12FFC