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VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library
VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13μm Logic 1P6M Salicide 1.3V/3.3V process. This library is fully compliant with JESD8-8 Stub Series Terminated Logic for 3.3V (SSTL3), JESD8-9B Stub Series Terminated Logic for 2.5V (SSTL2) and JESD79E DDR SDRAM specification.
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SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library IP
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