PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
USB2.0 PHY - SMIC130nm Eflash
特色
- Low cost;
- Low EMI; Ultra-low size: 0.19mm2
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USB2.0 PHY IP
- USB2.0 PHY, 8-bit or a 16-bit parallel interface, remaining backward compatible with USB1.1 legacy protocol at 12Mbps
- USB 2.0 PHY IP, Silicon Proven in TSMC 22ULP
- USB2.0 Host Transceiver PHY
- USB 2.0 OTG High / Full / Low- Speed Dual Role IP Core
- IBM 65nm USB2.0 Dual Role PHY
- SMIC 65nm USB2.0 Dual Role PHY