USB-C 3.2 SS/SSP PHY in Type-C in TSMC (N7, N6, N5, N3E)

The Synopsys SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes controllers, PHYs with support for the USB Type-C™ connectivity specification, verification IP, and IP subsystems. These elements enable quick development of advanced chip designs incorporating the 20 Gbps SuperSpeed USB standard. The Synopsys USB 3.2 IP is targeted for integration into SoCs for mass storage devices, display and docking applications, cloud computing, and automotive applications. The Synopsys USB 3.2 Controller and PHY IP allow designers to maximize power efficiency for extended battery life. The Synopsys USB 3.2 IP enables the fastest USB data transfer speeds while lowering overall power consumption. As the leading supplier of USB IP, Synopsys provides designers with a high-performance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.

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