The DesignWare® SuperSpeed 3.2 USB IP solution is based on the USB 3.2 specification from the USB Implementer Forum. The USB 3.2 IP offering includes controllers, PHYs with support for the USB Type-C™ connectivity specification, verification IP, and IP subsystems. These elements enable quick development of advanced chip designs incorporating the 20 Gbps SuperSpeed USB standard. The DesignWare USB 3.2 IP is targeted for integration into SoCs for mass storage devices, display and docking applications, cloud computing, and automotive applications.
The DesignWare USB 3.2 Controller and PHY IP allow designers to maximize power efficiency for extended battery life. The DesignWare USB 3.2 IP enables the fastest USB data transfer speeds while lowering overall power consumption.
As the leading supplier of USB IP, Synopsys provides designers with a highperformance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.
Video Demo of the USB-C 3.2 SS/SSP PHY, Type-C in TSMC (7nm, 5nm)
It’s critical to understand the challenges around layout, power, specification details, the software stack and subsystem when it comes USB Type-C implementation. Join Morten Christiansen as he discusses what you should consider before implementing USB Type-C in your SoC design. Learn more about how Synopsys DesignWare USB IP can help bring your products to market at https://www.synopsys.com/usb.