USB-C 3.1 SS/SSP PHY, Type-C in TSMC (16nm, 12nm, 7nm)
Synopsys' DesignWare USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the leading process technologies such as 14/16-nm FinFET. Both the USB-C 3.1 and USB 3.1 PHYs use a single efficient GDSII design that supports the SuperSpeedPlus (10 Gbps) and SuperSpeed (5 Gbps) speed modes. To maximize battery life in mobile applications, the DesignWare USB-C/USB 3.1 PHYs are designed to minimize power consumption and standby current. In addition, the DesignWare USB-C 3.1 femtoPHY is optimized to support the USB Type-C connectivity specification.
Synopsys DesignWare USB IP is the most certified USB IP solution in the industry. With over 3,000 design wins and approximately three billion silicon-proven units shipped, Synopsys' complete USB IP solution, consisting of digital controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits, enables designers to lower integration risk and speed time-to-market.
Supports 10 Gbps and 5 Gbps data rates
x1 and x2 configurations (USB 3.1 PHY only)
Low active and standby power
Small area for low silicon cost
USB Type-C connectivity support available
Supports SuperSpeed USB 3.1 at 10 Gbps, SuperSpeed USB 3.0 at 5 Gbps, and HighSpeed USB (USB 2.0)
Optimized Host, Device, and DualRole Device controller IP designed to achieve lowest power and area for portable electronics
DesignWare USB-C 3.1/DisplayPort 1.3 TX PHYs and controllers offer high-performance throughput for 4K and 8K display
Supports PIPE and UTMI+ PHY interfaces
Architectural features reduce power consumption
Complete DesignWare USB solutions for USB 3.1 consist of controllers, PHYs, verification IP, IP Prototyping Kits, and IP Software Development Kits
SuperSpeed USB IP offering from the #1 provider of USB IP for thirteen years in a row (Gartner 2014)
Smartphones, tablets, ultrabooks
USB to video display or video display adaptors
Set-top boxes, smart TVs ,and digital TVs
Cloud computing/enterprise and server SoCs
Video Demo of the USB-C 3.1 SS/SSP PHY, Type-C in TSMC (16nm, 12nm, 7nm)
It’s critical to understand the challenges around layout, power, specification details, the software stack and subsystem when it comes USB Type-C implementation. Join Morten Christiansen as he discusses what you should consider before implementing USB Type-C in your SoC design. Learn more about how Synopsys DesignWare USB IP can help bring your products to market at https://www.synopsys.com/usb.