The USB 3.0 PHY is a complete, mixed-signal semiconductor intellectual property (IP) solution, designed for single-chip integration into USB 3.0 SuperSpeed applications. The USB 3.0 PHY, usb3_sspxN_hspxN, includes all the necessary logical, geometric, and physical design files to implement complete USB 3.0 physical layer capability, connecting a USB OTG controller, host controller, or device controller to a USB system. The USB 3.0 PHY supports the USB 3.0 SuperSpeed (5 Gbps) protocol and data rate and is backward compatible with USB 2.0 high-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps) protocols and data rates.