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USB 2.0 Host Controller
The USB 2.0 Host Controller core (GRUSBHC) provides a link between the AMBA on-chip bus and the Universal Serial Bus (USB). The host controller supports High-, Full- and Low-Speed USB traffic.
USB 2.0 High-Speed functionality is supplied by an enhanced host controller implementing the Enhanced Host Controller Interface (EHCI). Full- and Low-Speed functionality (USB 2.0 and USB 1.1) is supplied by one or more companion controllers implementing the Universal Host Controller Interface (UHCI). The Port Router supplies the dynamic connection between the host controllers and the USB transceivers.
The core can handle up to 15 downstream ports, where each port can handle all three USB speeds. Port routing within the core is highly configurable. The designer has choices ranging from handling Full/Low-Speed traffic with one companion controller per port, to having one companion controller handle all ports. The modularity of the core enables the designer to configure High- or Full/Low-Speed only products. Both controller types have support for big and little endian systems, with the option to adjust the register interfaces' byte order to fit the target platform.
The core supports UTMI+ 16-bit transceivers at 30 MHz and 8-bit transceivers at 60 MHz, and ULPI 8-bit transceivers at 60 MHz.
USB 2.0 High-Speed functionality is supplied by an enhanced host controller implementing the Enhanced Host Controller Interface (EHCI). Full- and Low-Speed functionality (USB 2.0 and USB 1.1) is supplied by one or more companion controllers implementing the Universal Host Controller Interface (UHCI). The Port Router supplies the dynamic connection between the host controllers and the USB transceivers.
The core can handle up to 15 downstream ports, where each port can handle all three USB speeds. Port routing within the core is highly configurable. The designer has choices ranging from handling Full/Low-Speed traffic with one companion controller per port, to having one companion controller handle all ports. The modularity of the core enables the designer to configure High- or Full/Low-Speed only products. Both controller types have support for big and little endian systems, with the option to adjust the register interfaces' byte order to fit the target platform.
The core supports UTMI+ 16-bit transceivers at 30 MHz and 8-bit transceivers at 60 MHz, and ULPI 8-bit transceivers at 60 MHz.
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