Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
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USB 2.0 Device, Software Enumeration FIFO Interface (USB20SF)
The USB 2.0 Device, Software Enumeration FIFO interface (USB20SF) IP Core is a FIFO based USB 2.0 device core with 32-bit Avalon/AXI interface and ULPI interface support. The core supports High Speed (480 Mbps), Full Speed (12 Mbps) and Low Speed (1.5 Mbps) functionality.
It has been designed to provide simplicity and flexibility along with its functionality has been verified on the hardware. Avalon/AXI interface allows to manage the control transfer using software, provides flexibility, while FIFO interface allows to transfer the data over non-control endpoint ensuring highest throughput.
It has been designed to provide simplicity and flexibility along with its functionality has been verified on the hardware. Avalon/AXI interface allows to manage the control transfer using software, provides flexibility, while FIFO interface allows to transfer the data over non-control endpoint ensuring highest throughput.
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Block Diagram of the USB 2.0 Device, Software Enumeration FIFO Interface (USB20SF)
usb IP
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- USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
- USB 2.0 PHY GlobalFoundaries 12nm, 22nm, 28nm, 40nm
- Multi-protocol SerDes PMA
- Complete USB Type-C Power Delivery PHY, RTL, and Software
- USB 2.0 OTG High / Full / Low- Speed Dual Role IP Core