MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5)
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USB 1.1 PHY IP, UMC 0.18um G2 process
USB 1.1 PHY, UMC 0.18um GII Logic process 1.8/3.3V.
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