MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, N7, N5A)
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Universal video encoder supporting encoding of NTSC, PAL, 960H, AHD, HD-CVI and HD-TVI
PT57 is a video encoder IP (intellectual property) core supporting NTSC-M/PAL standards as well as 960H NTSC/PAL, and AHD/HD-CVI/HD-TVI analogue HD formats at 720p-25Hz/30Hz, 1080p25Hz/30Hz, 4MP-25Hz/30Hz and 5MP-12.5Hz/20Hz resolutions.
Control and status registers are written to and read from using a conventional 8-bit wide microprocessor interface.
The intellectual property block is provided as RTL compliant Verilog-2001 source code for FPGAs from all vendors or for ASICs.
Control and status registers are written to and read from using a conventional 8-bit wide microprocessor interface.
The intellectual property block is provided as RTL compliant Verilog-2001 source code for FPGAs from all vendors or for ASICs.
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Block Diagram of the Universal video encoder supporting encoding of NTSC, PAL, 960H, AHD, HD-CVI and HD-TVI
