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UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library
查看 UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library 详细介绍：
- 查看 UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library 完整数据手册
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Logic Libraries IP
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for GLOBALFOUNDRIES (55nm, 40nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for HUALI (55nm, 40nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for SMIC (65nm, 40nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for UMC (40nm, 28nm)
- UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)