Analog Front End: 8x 12-bit 2 GSPSADCs, 4x 12-bit 200 MSPS ADCs, TVM, PLL, LDO
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UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library
UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library
查看 UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library 详细介绍：
- 查看 UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library 完整数据手册
- 联系 UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library 供应商
Logic Libraries IP
- Duet Package of Embedded Memories and Logic Libraries for GF (55nm, 40nm, 22nm)
- Duet Package of Embedded Memories and Logic Libraries for Huali (55nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
- Duet Package of Embedded Memories and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm, N7, N6, N5, N4P)
- Duet Package of Embedded Memories and Logic Libraries for UMC (40nm, 28nm)
- SMIC 0.13um Low Leakage UHD RVT_x000D_ Logic standard cell library, compatible with E-Flash and EEPROM process.