UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
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UMC 28nm HPC/Low-K process , 1.25G-16Gbps 4-Lane SERDES
UMC 28nm HPC/Low-K process , 1.25G-16Gbps 4-Lane SERDES
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Interface Solution IP
- PCIe 6.1 Controller
- Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 4.0 Controller with AMBA AXI interface
- Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard
- HW/SW interface foundation for design innovation