RadHard Wideband SiGe VCO for Low Ultra Low Noise Application
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UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
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Logic Libraries IP
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for TSMC (65nm, 40nm, 28nm, 16nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for GLOBALFOUNDRIES (55nm, 40nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for HUALI (55nm, 40nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for SMIC (65nm, 40nm)
- High-Speed, High-Density and Low Power Memory Compilers and Logic Libraries for UMC (40nm, 28nm)
- UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90). W/O deep Nwell.